Downloads

Feel free to download any of the documents on this page.  Please keep in mind that all documents are part of Ternarylogic’s Intellectual Property which is explicitly not in the public domain. We suggest you check with us if you would like to use or implement any of our inventions.  The easiest check is to read our patents and patent applications.


Intellectual Property: Patents and Patent Applications


Ternarylogic LLC owns the Intellectual Property rights to a portfolio of non-binary and binary signal processing inventions. These inventions are the subject of non-provisional patent applications. Ternarylogic LLC is engaged in creating a pioneering IP portfolio with the broadest possible claims.

The first 15 of over 20 patent applications have been published at the USPTO Patent Applications PreGrant database. Three patents have been issued. The patents and published applications can be downloaded in PDF format by clicking on the following titles.

20050053240: Ternary and higher multi-value digital scramblers/descramblers;

7,002,490: Ternary and higher multi-value digital scramblers/descramblers;

20050184888: Generation and detection of non-binary digital sequences;

20050185796: Ternary and multi-value digital signal scramblers, descramblers and
sequence generators;

7,218,144: Single and composite binary and multi-valued logic functions from gates and inverters;

7,064,684: Sequence detection by multi-valued coding and creation of multi-code sequences;

20050278661: Multi-valued digital information retaining elements and memory devices;

20060031278: Multi-value digital calculating circuits, including multipliers;

20060164883: Multi-valued scrambling and descrambling of digital data on optical disks and other storage media;

20060187092: Sequence detection by multi-valued coding and creation of multi-code sequences;

20060282607: Binary digital latches not using only NAND or NOR circuits;

20070005673: The Creation and Detection of Binary and Non-Binary Pseudo-Noise Sequences Not Using LFSR Circuits;

20070071068: Encipherment of Digital Sequences by Reversible Transposition Methods;

20070088997: Generation and Self-Synchronizing Detection of Sequences Using Addressable Memories;

20070098160: Scrambling and Self-Synchronizing Descrambling Methods for Binary and Non-binary Signals Not Using LFSRs;

The application 20050265463 has also impact on binary signals, as it shows how recoding of binary signals into n-valued signals can dramatically improve correlation properties of binary sequences and their detection.

The application 20050185796 provides universal rules for the construction of LFSR based matching scramblers and descramblers (binary and non-binary). It shows how the binary LFSR scrambler/descrambler is a fortunate and easy to understand variant of the more complex n-valued solution set.

The application 20050278661 provides the universal rules for creating binary and n-valued latches. It shows how switching functions (rather than physical phenomena) can create 'memory' effects. It also shows clearly that latches do not 'remember': they just do not change previous states under certain conditions. The invention demonstrates what 'forbidden states' in latches are, why they are unavoidable and how to design n-valued latches for the best or rather least worst 'forbidden state'.

The application 20060031278 provides novel methods for executing multiplications. These methods cannot be derived from binary multiplication methods. The novel methods can significantly diminish functional propagation delays due to carry calculations. Digital FIR filters using the novel methods are also disclosed.

Binary spin-off from non-binary developments


Binary logic may be considered to be a subset of a higher valued logic. In practical terms that means that properties that are readily apparent in non-binary logic are much less apparent in binary logic, but will still apply.

Ternarylogic LLC has developed novel binary technology for which patents applications have been filed. Some examples are:
- binary latches using non-commutative functions;
- generating random binary sequences of even length;
- realization of pseudo-random scramblers and descramblers by addressable memories not using shift registers;
- simple, self synchronizing means for detecting Gold sequences;
- novel apparatus and means for convolutional error correcting decoders;
- novel apparatus and means for implementing Recursive Systematic Convolutional coders and decoders;

White Papers


A series of white papers on aspects of MVL inventions have been created and can be downloaded. Visitors to this site should be cautioned that much of the disclosures in the articles are covered by Patent Applications. Publication of the articles is for educational purposes only. No license for application of the disclosures is granted by this publication.  Such a license can only be obtained in writing from Ternarylogic LLC. All rights to the Intellectual Property are reserved and owned by Ternarylogic LLC.

Basic n-valued approaches

1. N-valued switches.

2. N-valued inverters.

3. Realizing n-valued logic functions.

4. Reducing n-valued logic functions with inverters.

5. Reducing z = ax +by in n-valued logic.


A limited set of applications

1. A general LFSR based descrambler model.

2. A switching model for binary latches.

3. LFSR based sequence detectors.

4. PN generators, not using LFSRs.

5. Improved detection of binary sequences by multi-valued coding.

6. "DON'T CARE" functions in equivalent logic expressions.

7. Logic circuits with gates and inverters in 'chained' expressions.

8. What if one plus one is seven?