The Book "The Logic of More. Applications in Non-binary Machine Logic" is now available for purchase as an eBook.
This is the first comprehensive book focused on the implementation and application of non-binary switching functions in computer devices. The 27 chapters of the book are based on a series of patented non-binary inventions, including machine arithmetic, memory devices, sequence generators, sequence detectors, error correcting coders and decoders and non-binary encryption and decryption.
Besides explaining novel non-binary machine logic, the book also provides a fresh and unusual but simple and useful view on aspects of classical digital circuits such as memory latches, correlators, multipliers and data scramblers and descramblers.
Reed Solomon and convolutional coders are approached as simple non-binary switching devices rather than implementations of polynomial arithmetic.
Many simple and easy to follow examples are provided.
The concept of non-binary machine logic or n-state switching is based on developing the appropriate switching functions. That is: finding the n-state switching functions that are appropriate for their purpose. This is not a trivial task.
A series of 4 introductory presentations illustrated with relatively simple examples (including Freemat/Matlab programs) is available to be bought, presently for a very low price of 99 cent. These presentations partially replace the web pages that have been taken down. Your purchase will support the development of new inventions. Thank you!
The first presentation provides examples of non-binary switching tables implemented in Freemat/Matlab and explains the background of non-binary switching.
The second presentation deals with machine arithmetic and shows how in non-binary switching multiplications the number of required switching functions can be significantly reduced. As an example a multiplication in radix-n with a multi-digit constant multiplier is illustrated.
The third presentation deals with non-binary Feedback Shift Register based scramblers and descramblers and some non-binary switching functions that can be applied.
The fourth presentation deals with non-binary switching logic based memory latches. No general formula is currently available to design any two function feedback latch. A switching model is applied to find functions (binary and non-binary) that implement a memory.
Simple Matlab®/Freemat programs are included to illustrate switching functions.
Each presentation is captured as an mp4 video presentation in a lecture format illustrated by the slides and showing the Freemat/Matlab® programs being executed in real-time. Each of these mp4 lectures is between 20-30 minutes and is a file of 40Meg or larger. You can elect to download the mp4 files or download only the slides and the programs.
Our next project is to finalize the 25 video presentations and the accompanying slides and Matlab®/Freemat programs. When finished, you can purchase the set also from this page. A limited personal and non-transferable license to the entire Ternarylogic LLC portfolio will be included. The price of this set will be $ 24.75.
An overview of the Ternarylogic portfolio can be reviewed at www.ternarylogic.com/portfolio.pdf .
N-state Solutions (much
of which will be covered in the eBOOK)
MVL can be applied in the same way as binary logic and in the same type of applications. There are also other applications for MVL that fundamentally do not exist in binary logic. Ternarylogic has created novel technologies which apply the power of n-valued logic and can provide direct benefits. These applications include:
2. Correlation amplification
4. Memory circuits
5. Linear Feedback Shift Register (LFSR) circuits
6. Galois and Fibonacci LFSR configurations
7. Eliminating multipliers in LFSRs
8. Error correction coding
The portfolio includes new solutions to multi-level convolutional coding and decoding based on a deterministic approach that does not use a trellis. Extended error correcting capabilities are explained.
Another important element of the portfolio is a novel approach to Reed Solomon error correction decoding, which does not apply the traditional and resource intensive error locator polynomial approach using syndrome calculations. In another embodiment the RS-decoder does not apply error-values or the Forney algorithm to correct a symbol in error.
A third element in error correction in the portfolio is a reversible method to determine and insert n-valued check symbols for error detection. The method can be applied in multi-level Low Density Parity Check Symbol (LDCP) coding in one embodiment.
A fourth element in error correction in the portfolio is a very simple and effective n-valued Hamming code.
9. Non LFSR methods in n-valued pseudo-noise sequence generation
10. Non LFSR methods in self synchronizing descrambling
11. N-valued scrambling and descrambling for optical disks