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Ternarylogic LLC

the N-state Switching eBOOK

The Book "The Logic of More.  Applications in Non-binary Machine Logic" is now available for purchase as an eBook for $ 9.95.

This is the first comprehensive book focused on the implementation and application of non-binary switching functions in computer devices. The 27 chapters of the book are based on a series of patented non-binary inventions, including machine arithmetic, memory devices, sequence generators, sequence detectors, error correcting coders and decoders and non-binary encryption and decryption.

Besides explaining novel non-binary machine logic, the book also provides a fresh and unusual but simple and useful view on aspects of classical digital circuits such as memory latches, correlators, multipliers and data scramblers and descramblers.

Reed Solomon and convolutional coders are approached as simple non-binary switching devices rather than implementations of polynomial arithmetic.

Many simple and easy to follow examples are provided.

Take a look at the Table of Content.

Hardcopy of the Book

A nicely printed hardcopy of the book is now also available. The price is $ 180. The higher price reflects the printing costs. Fulfillment of printing and delivery of the book is provided by The Bookpatch. This will add between $12 -$20 to the price of the book, based on your location and selected delivery. The hardcopy has a 8 by 11 inch size format and is much easier to read than on a screen.

Please allow 2-3 weeks for delivery.

  TheBookPatch.com Buy Now style 1 button

Substantial discount rates are available for purchase of multiple copies. Contact us at admin@ternarylogic.com.

the Presentations

The concept of non-binary machine logic or n-state switching is based on developing the appropriate switching functions. That is: finding the n-state switching functions that are appropriate for their purpose. This is not a trivial task.

A series of 4 introductory presentations illustrated with relatively simple examples (including Freemat/Matlab programs) is available to be bought, presently for a very low price of 99 cent. These presentations partially replace the web pages that have been taken down. Your purchase will support the development of new inventions. Thank you!

The first presentation provides examples of non-binary switching tables implemented in Freemat/Matlab and explains the background of non-binary switching.

The second presentation deals with machine arithmetic and shows how in non-binary switching multiplications the number of required switching functions can be significantly reduced. As an example a multiplication in radix-n with a multi-digit constant multiplier is illustrated.

The third presentation deals with non-binary Feedback Shift Register based scramblers and descramblers and some non-binary switching functions that can be applied.

The fourth presentation deals with non-binary switching logic based memory latches. No general formula is currently available to design any two function feedback latch. A switching model is applied to find functions (binary and non-binary) that implement a memory.

Simple Matlab®/Freemat programs are included to illustrate switching functions.  

Each presentation is captured as an mp4 video presentation in a lecture format illustrated by the slides and showing the Freemat/Matlab® programs being executed in real-time. Each of these mp4 lectures is between 20-30 minutes and is a file of 40Meg or larger. You can elect to download the mp4 files or download only the slides and the programs.

Presentations 1-4 in Non-Binary Machine Logic : (1) Introduction; (2) Machine Arithmetic; (3) Scramblers and Descramblers; (4) Memory Latches


Our next project is to finalize the 25 video presentations and the accompanying slides and Matlab®/Freemat programs.  When finished, you can purchase the set also from this page. A limited personal and non-transferable license to the entire Ternarylogic LLC portfolio will be included. The price of this set will be $ 24.75.

An overview of the Ternarylogic portfolio can be reviewed at www.ternarylogic.com/portfolio.pdf .

N-state Solutions (much of which will be covered in the eBOOK)

MVL can be applied in the same way as binary logic and in the same type of applications.  There are also other applications for MVL that fundamentally do not exist in binary logic. Ternarylogic has created novel technologies which apply the power of n-valued logic and can provide direct benefits. These applications include:

1. Realization of n-valued circuits
By applying n-state switches and n-valued inverters any n-valued 2-inputs/single output switching function can be realized.  In an extension of this technology also more than 2 inputs n-valued functions can be used.  These multi-input n-valued functions can be extremely efficient by using a limited number of inverters.

2. Correlation amplification
Comparing sequences of symbols that are comparatively identical by correlation is difficult.  It would be beneficial if the differences between the sequences could be enhanced or amplified.  This can be achieved by recoding symbols in a sequence and the sequence for comparison in a higher value set of symbols and correlating the recoded sequences.

3. Arithmetic
N-valued logic provides capabilities to logically reduce a combination of multiplication by a constant of two variable symbols followed by an addition by a single n-valued logic expression for the n-valued residue and the carry symbol.

4. Memory circuits
Latches and flip-flops are fundamentally logic based memory circuits, as opposed to physical phenomena memory circuits.  N-valued memory latches can be created by using the proper n-valued logic functions in feedback configurations, making storing and retrieving of n-valued data much faster.

5. Linear Feedback Shift Register (LFSR) circuits
N-valued LFSRs are applied in novel scramblers, descramblers and sequence generators.  N-valued LFSRs are also applied in sequence detectors and synchronization detectors. LFSR circuits use of course shift registers.  New technology can realize self- synchronizing LFSRs in memory configurations.

6. Galois and Fibonacci LFSR configurations
LFSRs can come in Fibonacci and Galois configurations.  In many cases Galois configurations are preferred because they are faster.  However they are also more difficult to analyze.  Self-synchronizing descramblers in Galois configuration are part of the new technology. Also rules for creating equivalent Galois and Fibonacci configurations are available.

7. Eliminating multipliers in LFSRs
Polynomial arithmetic over GF(n) almost certainly has to use one or more multipliers.  Novel technology can be used to circumvent the use of multipliers in LFSRs.

8. Error correction coding
An important part of Ternarylogic’s portfolio is focused on error correction coding.

The portfolio includes new solutions to multi-level convolutional coding and decoding based on a deterministic approach that does not use a trellis.  Extended error correcting capabilities are explained. 

Another important element of the portfolio is a novel approach to Reed Solomon error correction decoding, which does not apply the traditional and resource intensive error locator polynomial approach using syndrome calculations. In another embodiment the RS-decoder does not apply error-values or the Forney algorithm to correct a symbol in error.

A third element in error correction in the portfolio is a reversible method to determine and insert n-valued check symbols for error detection.  The method can be applied in multi-level Low Density Parity Check Symbol (LDCP) coding in one embodiment.

A fourth element in error correction in the portfolio is a very simple and effective n-valued Hamming code.

9. Non LFSR methods in n-valued pseudo-noise sequence generation
The novel method creates n-valued sequences by applying consecutive overlapping word.  This allows for creating sequences of n-valued symbols without a forbidden word.

10. Non LFSR methods in self synchronizing descrambling
Addressable memories with pre-determined states provide self-synchronizing descrambling and detection of sequences.  Issues of Fibonacci and Galois configurations are circumvented.  Scramblers and descramblers can be created that cannot be realized by LFSRs.  Self synchronizing detection of Gold sequences is enabled.

11. N-valued scrambling and descrambling for optical disks
Scrambling of n-valued symbols to a storage medium and descrambling of n-valued symbols from the medium is enabled.  The method also allows synchronization of tracks by simple LFSR detectors instead of using correlation methods.